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Langage VHDL

11 bytes removed, 11:44, 14 September 2016
/* Jongleur */
=> travail en cours
* [EN COURSFAIT] Réalisé un compteur de 2Hz et faire tourner les segment dans le sens des aiguilles d'une montre (sens de F1 -> E1 -> A1 -> A2 -> B2 -> C1... en on recommence)
''In English :'' With an electronics board created by the ETML-ES School and equiped with a FPGA, realization / Simulation of a juggler with the both 7 Segments Display
=> work in progress
* [IN PROGRESSDONE] Realized a cycle counter of 2Hz to do turned the segments in clockwise (Way: F1 -> E1 -> A1 -> A2 -> B2 -> C1... it is continuous
== Project Source ==
952
edits